The Largest Probabilistic Computer Yet

Researchers at UC Santa Barbara and Stanford have built a probabilistic computer with 1 million probabilistic bits (p-bits), the largest ever. The machine runs on 18 field-programmable gate arrays (FPGAs) and achieves over a trillion p-bit flips per second. The work, posted on arXiv on June 24, shows that probabilistic computers can scale by networking multiple chips, a feat previously in doubt.

What Are Probabilistic Bits?

Standard bits are either 0 or 1. Qubits can be 0, 1, or any superposition. P-bits flip between 0 and 1 with a tunable probability. Alone, a flipping bit is noise. But correlated p-bits can solve stochastic problems—optimization, sampling, and inference—that rely on probabilities rather than exact values.

Unlike dedicated Ising machines or QUBO devices, probabilistic computers are general-purpose and programmable, says Kerem Çamsarı, associate professor at UCSB. The 2019 Nature prototype had 8 p-bits. By 2023, a machine with 7,200 p-bits existed, but each was on a single chip. Scaling across chips seemed hard because correlated fluctuations must sync across wires.

Scaling with a Simple Rule

The new study reveals a straightforward design rule: as long as inter-chip communication happens faster than a calculated threshold, the chips behave as one machine. Below that threshold, speed vs. accuracy tradeoffs appear. The team found no need for global lockstep synchronization, which simplifies scaling.

“Our machine communicates without global lockstep synchronization,” says Navid Anjum Aadit, postdoc at Stanford. This discovery makes building arbitrarily large probabilistic computers from many chips feasible, similar to how standard computers scale with CPUs and GPUs.

Hardware Implementation

The probabilistic computer uses 18 Xilinx FPGAs (specific model not disclosed, but likely high-end Kintex or Virtex series). The p-bits are implemented in software on the reconfigurable logic, not as physical flipping devices. This allows flexibility but sacrifices some energy efficiency compared to specialized hardware.

The researchers note that the same scaling rules apply to any hardware, including future chips built with magnetic tunnel junctions (MTJs). The 2019 Nature prototype used MTJs, which are more energy-efficient for probabilistic computing than CMOS. “Systems combining CMOS with dense stochastic memory technologies such as MRAM offer one of the most compelling paths forward,” Aadit adds.

Why This Matters for Developers

Probabilistic computers excel at optimization and sampling problems that are hard for classical computers. For example, finding the shortest delivery route (traveling salesman) or training certain machine learning models. While not a replacement for GPUs, they could become a coprocessor for specific workloads.

Currently, no SDK or API is publicly available. The researchers plan to build larger machines with dedicated p-bit hardware. For now, FPGA-based implementations can be replicated using open-source tools like Verilog and Xilinx Vivado. A simple p-bit core might look like:

module pbit(
    input clk,
    input [7:0] probability, // 0-255 representing 0.0-1.0
    output reg out
);
    always @(posedge clk) begin
        if ($urandom_range(255) < probability)
            out <= 1;
        else
            out <= 0;
    end
endmodule

Correlating many such p-bits requires a coupling network—typically a matrix multiplication or Boltzmann machine architecture.

Performance and Benchmarks

The 1-million-p-bit machine achieves >1 trillion flips/second. But raw flip rate isn't the whole story. The key metric is solving time for specific problems. The paper reports results for a 1000-variable Ising model (a common benchmark), converging to near-optimal solutions within microseconds. Exact numbers are in the arXiv preprint.

Compared to the 2023 7,200-p-bit single-chip device, the new machine is ~140x larger in p-bit count, but inter-chip latency adds overhead. The scaling rule ensures that overhead doesn't degrade solution quality.

Next Steps

The team aims to build a machine with specialized p-bit hardware, likely using MTJs or MRAM. For developers, probabilistic computing remains research-stage, but the scaling proof-of-concept opens the door to practical systems within a few years. If you're working on optimization problems, keep an eye on this space—especially if your problems involve stochasticity or NP-hard combinatorial optimization.